Renesas H8 Series Hardware Manual page 637

PWDRU1—PWM1 Data Register U
Bit 7

Initial value 1

Read/Write
PWDRL1—PWM1 Data Register L
Bit 7
PWDRL17
Initial value 0
Read/Write W
PDR1—Port Data Register 1
Bit 7
P1
Initial value 0
Read/Write R/W
Data for port 1 pins
Note: * P1
is not equipped with H8/38124 Group.
6
PDR3—Port Data Register 3
Bit 7
P3
Initial value 0
Read/Write R/W
6 5
 
1 1
 
Upper 2 bits of data for generating PWM1 waveform
6 5
PWDRL16 PWDRL15 PWDRL14 PWDRL13
0 0
W W
Lower 8 bits of data for generating PWM1 waveform
6 5
* 
P1
7 6

0

R/W
6 5
P3 P3
7 6 5
0 0
R/W R/W
Appendix B Internal I/O Registers
H'D1
4 3
  
1 1
  
H'D2
4 3
PWDRL12 PWDRL11
0 0
W W W
H'D4
4 3
P1 P1
4 3
0 0
R/W R/W
H'D6
4 3
P3 P3
4 3
0 0
R/W R/W
Data for port 3 pins
Rev. 7.00 Mar 10, 2005 page 595 of 652
10-Bit PWM
2 1 0
PWDRU11 PWDRU10
1 0 0
W W
10-Bit PWM
2 1 0
PWDRL10
0 0 0
W W
I/O Ports
2 1
 
 
 
I/O Ports
2 1
P3 P3 P3
2 1
0 0
R/W R/W R/W
REJ09B0042-0700
0



0
0
0