Register Descriptions; A/D Result Registers (Adrrh, Adrrl); A/D Mode Register (Amr) - Renesas H8 Series Hardware Manual

8-bit single-chip microcomputer
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Section 12 A/D Converter
12.2

Register Descriptions

12.2.1

A/D Result Registers (ADRRH, ADRRL)

Bit
7
6
ADR9 ADR8 ADR7 ADR6 ADR5
Initial value
Unde-
Unde-
fined
fined
Read/Write
R
R
ADRRH and ADRRL together comprise a 16-bit read-only register for holding the results of
analog-to-digital conversion. The upper 8 bits of the data are held in ADRRH, and the lower 2
bits in ADRRL.
ADRRH and ADRRL can be read by the CPU at any time, but the ADRRH and ADRRL values
during A/D conversion are not fixed. After A/D conversion is complete, the conversion result is
stored as 10-bit data, and this data is held until the next conversion operation starts.
ADRRH and ADRRL are not cleared on reset.
12.2.2

A/D Mode Register (AMR)

Bit
7
CKS
Initial value
0
Read/Write
R/W
AMR is an 8-bit read/write register for specifying the A/D conversion speed, external trigger
option, and the analog input pins.
Upon reset, AMR is initialized to H'30.
Rev. 7.00 Mar 10, 2005 page 402 of 652
REJ09B0042-0700
5
4
3
2
ADR4 ADR3
Unde-
Unde-
Unde-
Unde-
Unde-
fined
fined
fined
fined
fined
R
R
R
R
ADRRH
6
5
TRGE
0
1
R/W
1
0
7
6
5
ADR2
ADR1 ADR0
Unde-
Unde-
Unde-
fined
fined
fined
R
R
R
R
4
3
CH3
1
0
R/W
4
3
2
1
ADRRL
2
1
CH2
CH1
CH0
0
0
R/W
R/W
R/W
0
0
0

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