Renesas H8 Series Hardware Manual page 620

Appendix B Internal I/O Registers
TCRF—Timer Control Register F
Bit 7
TOLH
Initial value 0
Read/Write W
Toggle Output Level H
0 Low level
1 High level
Rev. 7.00 Mar 10, 2005 page 578 of 652
REJ09B0042-0700
6 5
CKSH2 CKSH1 CKSH0
0 0
W W
Toggle Output Level L
0 Low level
1 High level
Clock Select H
0 Except 16-bit mode, counting on TCFL
for 11 overflow signal
0 1 1 Do not specify this combination
Internal clock φ/32
1 0 0
Internal clock φ/16
1 0 1
Internal clock φ/4
1 1 0
Internal clock φ w /4
1 1 1
H'B6
4 3 2
TOLL CKSL2
0 0 0
W W W
Clock Select L
0 Except Counting on external event (TMIF)
for 11 rising/falling edge
Do not specify this combination
0
1 1
Internal clock φ/32
1
0 0
Internal clock φ/16
1 0
1
Internal clock φ/4
1 1
0
Internal clock φ w /4
1 1
1
Timer F
1 0
CKSL1 CKSL0
0 0
W W