Renesas H8 Series Hardware Manual page 363

8-bit single-chip microcomputer

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Table of Contents

Bit 2—Count-up Enable L (CUEL)

Bit 2 enables event clock input to ECL. When 1 is written to this bit, event clock input is enabled

and increments the counter. When 0 is written to this bit, event clock input is disabled and the

ECL value is held.

ECL event clock input is disabled

ECL value is held

ECL event clock input is enabled

Bit 1—Counter Reset Control H (CRCH)

Bit 1 controls resetting of ECH. When this bit is cleared to 0, ECH is reset. When 1 is written to

this bit, the counter reset is cleared and the ECH count-up function is enabled.

ECH is reset

ECH reset is cleared and count-up function is enabled

Bit 0—Counter Reset Control L (CRCL)

Bit 0 controls resetting of ECL. When this bit is cleared to 0, ECL is reset. When 1 is written to

this bit, the counter reset is cleared and the ECL count-up function is enabled.

ECL is reset

ECL reset is cleared and count-up function is enabled

Event Counter H (ECH)

Initial Value

Rev. 7.00 Mar 10, 2005 page 321 of 652

Section 9 Timers

(initial value)

REJ09B0042-0700