Renesas H8 Series Hardware Manual page 348

Section 9 Timers
Timer Counter W (TCW)
Bit 7
TCW7
Initial value 0
Read/Write R/W
For the H8/38024, H8/38024S, and H8/38024R groups, the clock source is φ/8,192 or φw/32. For
the H8/38124 group, the clock source is selected based on the timer mode register (TMW) setting
if WDCKS is 0 and is φw/32 if WDCKS is 1.
When TCW overflows from H'FF to H'00, an internal reset signal is generated and WRST is set to
1 in TCSRW. Upon reset, TCW is initialized to H'00.
Timer Mode Register (TMW)
Bit 7
—
Initial value 1
Read/Write —
The TMW register is only implemented on the H8/38124. The input clock is selected using
combinations of CKS3 to CKS0.
Bits 7 to 4—Reserved
These bits are always read as 1.
Bits 3 to 0—Clock Select (CKS3 to CKS0)
These bits are used to select the clock input to TCW from among 10 internal options. Clock source
selection using this register is enabled when WDCKS in port mode register 2 (PMR2) is cleared to
0. If WDCKS is set to 1 the φw/32 clock source is selected, regardless of the settings of the bits in
this register.
Rev. 7.00 Mar 10, 2005 page 306 of 652
REJ09B0042-0700
6 5
TCW6 TCW5 TCW4
0 0
R/W R/W R/W
6 5
— —
1 1
— —
4 3 2
TCW3 TCW2
0 0 0
R/W R/W
4 3 2
— CKS3 CKS2
1 1 1
— R/W R/W
1 0
TCW1 TCW0
0 0
R/W R/W
1 0
CKS1 CKS0
1 1
R/W R/W