Renesas H8 Series Hardware Manual page 123

Interrupt Enable Register 1 (IENR1)
Bit 7
IENTA
Initial value 0
Read/Write R/W
IENR1 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7—Timer A Interrupt Enable (IENTA)
Bit 7 enables or disables timer A overflow interrupt requests.
Bit 7
IENTA Description
0 Disables timer A interrupt requests
1 Enables timer A interrupt requests
Bit 6—Reserved
Bit 6 is reserved: it can only be written with 0.
Bit 5—Wakeup Interrupt Enable (IENWP)
Bit 5 enables or disables WKP
Bit 5
IENWP Description
0 Disables
1 Enables
Bits 4 and 3—IRQ and IRQ
4
Bits 4 and 3 enable or disable IRQ
Bit n
IENn Description
0 Disables interrupt requests from pin
1 Enables interrupt requests from pin
6 5

IENWP

0
W R/W
to WKP interrupt requests.
7 0
to interrupt requests
W K P W K P
7 0
to interrupt requests
W K P W K P
7 0
Interrupt Enable (IEN4 and IEN3)
3
and IRQ
4
4 3
IEN4 IEN3
0 0
R/W R/W
interrupt requests.
3
I R Q n
I R Q n
Rev. 7.00 Mar 10, 2005 page 81 of 652
Section 3 Exception Handling
2 1
IENEC2 IEN1
0 0
R/W R/W
(initial value)
(initial value)
(initial value)
(n = 4 or 3)
REJ09B0042-0700
0
IEN0
0
R/W