Renesas H8 Series Hardware Manual page 184

8-bit single-chip microcomputer
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Section 5 Power-Down Modes
Register Name
Bit Name
CKSTPR2
LDCKSTP
PW1CKSTP
WDCKSTP
AECKSTP
PW2CKSTP
LVDCKSTP*
Notes: For details of module operation, see the sections on the individual modules.
* LVDCKSTP is implemented on the H8/38124 group only.
Rev. 7.00 Mar 10, 2005 page 142 of 652
REJ09B0042-0700
Operation
1
LCD module standby mode is cleared
0
LCD is set to module standby mode
1
PWM1 module standby mode is cleared
0
PWM1 is set to module standby mode
1
Watchdog timer module standby mode is cleared
0
Watchdog timer is set to module standby mode
1
Asynchronous event counter module standby mode
is cleared
0
Asynchronous event counter is set to module standby
mode
1
PWM2 module standby mode is cleared
0
PWM2 is set to module standby mode
1
LVD module standby mode is cleared
0
LVD is set to module standby mode

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