Renesas H8 Series Hardware Manual page 610

Appendix B Internal I/O Registers
SMR—Serial Mode Register
Bit 7
COM
Initial value 0
Read/Write R/W
Communication Mode
0
1
Rev. 7.00 Mar 10, 2005 page 568 of 652
REJ09B0042-0700
6 5
CHR PE
0 0
R/W R/W
Parity Enable
0 Parity bit addition and checking disabled
1 Parity bit addition and checking enabled
Character Length
0 8-bit data/5-bit data
1 7-bit data/5-bit data
Asynchronous mode
Synchronous mode
H'A8
4 3
PM STOP MP
0 0
R/W R/W R/W
Multiprocessor Mode
0 Multiprocessor communication
function disabled
1 Multiprocessor communication
function enabled
Stop Bit Length
0 1 stop bit
1 2 stop bits
Parity Mode
0 Even parity
1 Odd parity
2 1 0
CKS1 CKS0
0 0 0
R/W R/W
Clock Select
φ clock
0 0
φ w /2 clock
0 1
φ/16 clock
1 0
φ/64 clock
1 1
SCI3