Renesas H8 Series Hardware Manual page 395

Table 10.7 Relation between n and Clock
n Clock
φ
0
φ
1
/2 * /φw *
0
w
φ/16
2
φ/64
3
Notes: 1. φw/2 clock in active (medium-speed/high-speed) mode and sleep mode
2. φw clock in subactive mode and subsleep mode
In subactive or subsleep mode, SCI3 can be operated when CPU clock is φw/2 only.
CKS1
0
2
0
1
1
Section 10 Serial Communication Interface
SMR Setting
CKS0
0
1
0
1
Rev. 7.00 Mar 10, 2005 page 353 of 652
REJ09B0042-0700