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17.5 Transfer-Acceptance Signal Output and Transfer-End
Signal Output
Channels 0, 1 and 2 support a function for outputting the transfer-request-acceptance
signal from a pin.
When accepting transfer request input from a pin for DMA transfer, the DMAC outputs
the transfer-request-acceptance signal.
When accepting transfer request input from a pin for DMA transfer and ending the
transfer with the DMACT counter set to 0, the DMAC outputs the transfer-end signal.
I Transfer-acceptance signal output
The transfer-request-acceptance signal is output as active-low pulses when transfer data is
accessed. Using the AKSEn and AKDEn bits in DATCR, you can set whether to output that
signal synchronously with transfer source access, transfer destination access, or both of
transfer source access and transfer destination access.
I Transfer-end signal output
The transfer-end signal is output as active-low pulses when the final transfer data is accessed.
Using the EPSEn and EPDEn bits in DATCR, you can set whether to output that signal
synchronously with transfer source access, transfer destination access, or both of transfer
source access and transfer destination access.
CHAPTER 17 DMA CONTROLLER
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