Fujitsu MB91150 Series Hardware Manual page 14

CHAPTER 10 EXTERNAL INTERRUPT CONTROL BLOCK ......................................... 247
10.1 Overview of External Interrupt .......................................................................................................... 248
10.2 External Interrupt Registers .............................................................................................................. 249
10.2.1 Enable Interrupt Register (ENIRn) ............................................................................................... 250
10.2.2 External Interrupt Request Register (EIRRn) ............................................................................... 251
10.2.3 External Interrupt Level Setting Register (ELVR: External Level Register) ................................. 252
10.3 External Interrupt Operation .............................................................................................................. 253
10.4 External Interrupt Request Level ...................................................................................................... 254
CHAPTER 11 DELAYED INTERRUPT MODULE ........................................................... 255
11.1 Overview of Delayed Interrupt Module .............................................................................................. 256
11.2 Delayed Interrupt Control Register (DICR) ....................................................................................... 257
11.3 Operation of Delayed Interrupt Module ............................................................................................. 258
CHAPTER 12 INTERRUPT CONTROLLER .................................................................... 259
12.1 Overview of Interrupt Controller ........................................................................................................ 260
12.2 Block Diagram of the Interrupt Controller .......................................................................................... 261
12.3 List of Interrupt Controller Registers ................................................................................................. 262
12.3.1 Interrupt Control Register (ICR) ................................................................................................... 264
12.3.2 Hold-Request Cancellation-Request Level-Set Register (HRCL) ................................................ 266
12.4 Priority Evaluation ............................................................................................................................. 267
12.5 Return from Standby (Stop or Sleep) Mode ...................................................................................... 269
12.6 Hold-Request Cancellation Request ................................................................................................. 270
12.7 Example of Using Hold-Request Cancellation-Request Function (HRCR) ....................................... 271
CHAPTER 13 8/10-BIT A/D CONVERTER ...................................................................... 275
13.1 Overview of the 8/10-bit A/D Converter ............................................................................................ 276
13.2 8/10-bit A/D Converter Block Diagram .............................................................................................. 277
13.3 8/10-bit A/D Converter Pins .............................................................................................................. 279
13.4 8/10-bit A/D Converter Registers ...................................................................................................... 281
13.4.1 A/D Control Status Register 1 (ADCS1) ...................................................................................... 282
13.4.2 A/D Control Status Register 0 (ADCS0) ...................................................................................... 285
13.4.3 A/D Data Register (ADCR) .......................................................................................................... 287
13.5 8/10-bit A/D Converter Interrupt ........................................................................................................ 289
13.6 Operation of the 8/10-bit A/D Converter ........................................................................................... 290
13.7 A/D Converted Data Preservation Function ...................................................................................... 292
13.8 Notes on Using the 8/10-bit A/D Converter ....................................................................................... 293
CHAPTER 14 8-BIT D/A CONVERTER ........................................................................... 295
14.1 Overview of the 8-bit D/A Converter ................................................................................................. 296
14.2 8-bit D/A Converter Block Diagram ................................................................................................... 297
14.3 8-bit D/A Converter Registers ........................................................................................................... 298
14.3.1 D/A Control Registers (DACR0, DACR1, DACR2) ...................................................................... 299
14.3.2 D/A Data Registers (DADR2, DADR1, DADR0) .......................................................................... 300
14.4 8-bit D/A Converter Operation .......................................................................................................... 301
CHAPTER 15 UART ........................................................................................................ 303
15.1 Overview of the UART ...................................................................................................................... 304
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