Fujitsu MB91150 Series Hardware Manual page 426

CHAPTER 20 CALENDAR MACROS
I Year data register (CA7)
The year data register (CA7) has the following bit configuration:
7 bit
CA7 -
[bit 7] Reserved
These bits are reserved. Writing these bits is ignored.
[bit 6 to 0] Y6 to 0
These bits indicate year data. They indicate a binary value from 0 to 99.
I Calendar test register (CAS)
The calendar test register (CAS) has the following bit configuration:
7 bit
CAS TST
[bit 7] TST
[bit 0] TST
This bit is a TST bit. Be sure to set this bit to 0.
[bit 6 to 1] Reserved
This bit is a reserved bit. Writing this bit is ignored.
410
6 bit 5 bit 4 bit
Y6 Y5 Y4
6 bit 5 bit 4 bit
- - -
3 bit 2 bit 1 bit
Y3 Y2 Y1
3 bit 2 bit 1 bit
- - - TST
Initial value
0 bit
Y0 -XXXXXXX [R/W]
B
Initial value
0 bit
0------0 [R/W]
B