Fujitsu MB91150 Series Hardware Manual page 418

CHAPTER 19 PERIPHERAL STOP CONTROL
I Stop control register 1 (STPR1)
Stop control register 1 (STPR1) has the following bit configuration:
Address bit7
000091 ST17
H
[bit 7] ST17
0: Enables reload timer 0 operation.
1: Disables reload timer 0 operation.
[bit 6] ST16
0: Enables reload timer 1 operation.
1: Disables reload timer 1 operation.
[bit 5] ST15
0: Enables reload timer 2 operation.
1: Disables reload timer 2 operation.
[bit 4] ST14
0: Enables reload timer 3 operation.
1: Disables reload timer 3 operation.
[bit 3] ST13
0: Enables the free-run timer.
1: Disables the free-run timer.
[bit 2] ST12
0: Enables I
1: Disables I
[bit 1] ST11
0: Enables upward counter operation.
1: Disables upward counter operation.
[bit 0] ST10
0: Enables A/D converter operation.
1: Disables A/D converter operation.
402
bit6 bit5 bit4 bit3
ST16 ST15 ST14 ST13
2
C operation.
2
C operation.
bit2 bit1 bit0
ST12 ST11 ST10 00000000
Initial value
(R/W)
B