Fujitsu MB91150 Series Hardware Manual page 496

APPENDIX
I Other instructions
Table E-15 Other instructions
Mnemonic Type
NOP
ANDCCR #u8
ORCCR #u8
STILM #u8
*1
ADDSP #s10
EXTSB Ri
EXTUB Ri
EXTSH Ri
EXTUH Ri
LDM0 (reglist)
LDM1 (reglist)
*2
*LDM (reglist)
STM0 (reglist)
STM1 (reglist)
*3
*STM (reglist)
*4
ENTER #u10
LEAVE
XCHB @Rj, Ri
*1: The assembler changes s10 to s8 by calculating s10/4 and sets a value. s10 is a signed value.
*2: If reglist specifies any of R0 to R7, the assembler generates LDM0. If reglist specifies any of R8 to R15, the
assembler generates LDM1. The assembler may generate both LDM0 and LDM1.
*3: If reglist specifies any of R0 to R7, the assembler generates STM0. If reglist specifies any of R8 to R15, the
assembler generates STM1. The assembler may generate both STM1 and STM0.
*4: The assembler changes u10 to u8 by calculating u10/4 and sets a value. u10 is an unsigned value.
Notes:
• The number of execution cycles of LDM0 (reglist) and LDM1 (reglist) is a*(n-1)+b+1 cycles
• when the specified number of registers is n.
• The number of execution cycles of STM0 (reglist) and STM1 (reglist) is a*n+1 cycles when the
• specified number of registers is n.
480
OP CYCLE
E 9F-A 1
D 93 c
D 83 c
D 87 1
D A3 1
E 97-8 1
E 97-9 1
E 97-A 1
E 97-B 1
D 8C -
D 8D
D 8E -
D 8F
D 0F 1+a
E 9F-9 b
A 8A 2a
NZVC Operation
---- No change
CCCC CCR and u8 --> CCR
CCCC CCR or u8 --> CCR
---- i8 --> ILM
---- R15 += s10
---- Sign extension 8 --> 32bit
---- Zero extension 8 --> 32bit
---- Sign extension 16 --> 32bit
---- Zero extension 16 --> 32bit
---- (R15) --> reglist,
R15 increment
---- (R15) --> reglist,
R15 increment
(R15) --> reglist,
R15 increment
---- R15 decrement
reglist --> (R15)
---- R15 decrement
reglist --> (R15)
R15 decrement
reglist --> (R15)
---- R14 --> (R15 - 4),
R15 - 4 --> R14,
R15 - u10 --> R15
---- R14 + 4 --> R15,
(R15 - 4) --> R14
---- Ri --> TEMP
(Rj) --> Ri
TEMP --> (Rj)
Remarks
-
-
ILM immediate
value set
ADD SP instruction
-
Load multiple R0 to
R7
Load multiple R8 to
R15
Load multiple R0 to
R15
Store multiple R0 to
R7
Store multiple R8 to
R15
Store multiple R0 to
R15
Entry processing of
a function
Exit processing of a
function
For semaphore
control
Byte data