Output Compare Buffer Register (Occpbh0 To Occpbh5, Occpbl0 To Occpbl5) / Output Compare Register (Occph0 To Occph5, Occpl0 To Occpl5) - Fujitsu MB91260B Series Hardware Manual

11.4.5 Output Compare Buffer Register (OCCPBH0 to OCCPBH5,
OCCPBL0 to OCCPBL5) / Output Compare Register (OCCPH0 to
OCCPH5, OCCPL0 to OCCPL5)
The output compare buffer register (OCCPBH, OCCPBL) is a 16-bit buffer register for
the output compare register (OCCPH, OCCPL).
Both the OCCPBH, OCCPBL register and the OCCPH, OCCPL register exist in the same
address.
■ Output Compare Buffer Register
(OCCPBH: OCCPBH0 to OCCPBH5, OCCPBL: OCCPBL0 to OCCPBL5)
Output compare buffer register (Upper)
OCCPBH0 to OCCPBH5
Address :
000090
H
000092
H
Write →
000094
H Initial value →
000096
H
000098
H
00009A
H
Output compare buffer register (Lower)
OCCPBL0 to OCCPBL5
Write →
Initial value →
The output compare buffer register is a buffer register for the output compare register (OCCPH, OCCPL).
When the buffer function is disabled (the lower of the compare control register (OCSL0, OCSL2, OCSL4),
BUF1, BUF0: bit3, bit2 = "11
register is transferred to the output compare register immediately. When the buffer function is enabled (the
lower of the compare control register (OCSL0, OCSL2, OCSL4), BUF1, BUF0: bit3, bit2 = "00
value is transferred according to the transfer select bit (BTS1, BTS0: bit14, bit13) of the upper of the
compare control register (OCSH1, OCSH3, OCSH5) when a compare clear match or a zero detection
occurs.
To access this register, use a halfword or word access instruction.
Bit15 Bit14 Bit13
OP15 OP14 OP13
W W W
(0) (0) (0)
Bit7 Bit6 Bit5
OP07 OP06 OP05
W W W
(0) (0) (0)
"), or the free-run timer is stopped, the value of the output compare buffer
B
CHAPTER 11 MULTIFUNCTIONAL TIMER
Bit12 Bit11 Bit10
OP12 OP11 OP10
W W W
(0) (0) (0)
Bit4 Bit3 Bit2
OP04 OP03 OP02
W W W
(0) (0) (0)
Bit9 Bit8
OP09 OP08
W W
(0) (0)
Bit1 Bit0
OP01 OP00
W W
(0) (0)
"), the
B
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