Fujitsu MB91150 Series Hardware Manual page 133

❍ Byte access (when an LDUB or STB instruction is executed)
Figure 4.4-4 Relationship between internal register and external data bus for byte access
I Data bus width
❍ Relationship Between Internal Register and External Bus for 16-bit Bus
Figure 4.4-5 Relationship between internal register and external bus for 16-bit bus
❍ Relationship Between Internal Register and External Bus for 8-bit Bus
Figure 4.4-6 Relationship Between Internal Register and External Bus for 8-bit Bus
(a) The lower byte of the
output address is 0.
Internal register External bus
D31
AA
D23
D15
D07
AA
Internal register
The lower bytes of the output address
D31
AA Read/Write
D23
BB
D15
CC
D07
DD
Internal register
The lower bytes of the output address
D 3 1 Read/Write
AA
D 2 3
BB
D15
CC
D07
DD
(b) The lower byte of the output
address is 1.
Internal register External bus
D31 D31
D23 D23
D15
D07
AA
External bus
' 0 0 ' ' 1 0 '
AA CC
BB DD
External bus
'00' '01' '10' '1 1'
AA BB CC DD
CHAPTER 4 BUS INTERFACE
D31
D23
AA
D31
D23
D31
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