Fujitsu MB91150 Series Hardware Manual page 466

APPENDIX
Table B-1 Interrupt vectors (Continued)
Interrupt source
PPG1
PPG2
PPG3
PPG4
PPG5
U/D counter 0 (compare/underflow,
overflow, up/down inversion)
U/D counter 1 (compare/underflow,
overflow, up/down inversion)
ICU0 (fetch)
ICU1 (fetch)
ICU2 (fetch)
ICU3 (fetch)
OCU0 (match)
OCU1 (match)
OCU2 (match)
OCU3 (match)
OCU4/5 (match)
OCU6/7 (match)
System-reserved
16-bit free-run timer
Delayed interrupt source bit
System-reserved (used by
REALOS (*1))
System-reserved (used by
REALOS(*1))
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
450
Interrupt number
Decimal Hexadeci
notation mal
44 2C
45 2D
46 2E
47 2F
48 30
49 31
50 32
51 33
52 34
53 35
54 36
55 37
56 38
57 39
58 3A
59 3B
60 3C
61 3D
62 3E
63 3F
64 40
65 41
66 42
67 43
68 44
69 45
70 46
71 47
Interrupt
Offset
level
ICR28 34C
H
ICR29 348
H
ICR30 344
H
ICR31 340
H
ICR32 33C
H
ICR33 338
H
ICR34 334
H
ICR35 330
H
ICR36 32C
H
ICR37 328
H
ICR38 324
H
ICR39 320
H
ICR40 31C
H
ICR41 318
H
ICR42 314
H
ICR43 310
H
ICR44 30C
H
- 308
H
ICR46 304
H
ICR47 300
H
- 2FC
H
- 2F8
H
- 2F4
H
- 2F0
H
- 2EC
H
- 2E8
H
- 2E4
H
- 2E0
H
TBR default
address
000FFF4C
H
000FFF48
H
000FFF44
H
000FFF40
H
000FFF3C
H
000FFF38
H
000FFF34
H
000FFF30
H
000FFF2C
H
000FFF28
H
000FFF24
H
000FFF20
H
000FFF1C
H
000FFF18
H
000FFF14
H
000FFF10
H
000FFF0C
H
000FFF08
H
000FFF04
H
000FFF00
H
000FFEFC
H
000FFEF8
H
000FFEF4
H
000FFEF0
H
000FFEEC
H
000FFEE8
H
000FFEE4
H
000FFEE0
H