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APPENDIX
I Ordinary branch (no delay) instructions
Table E-13 Ordinary branch (no delay) instructions
Mnemonic
Type
JMP @Ri
E
CALL label12
F
CALL @Ri
E
RET
E
INT
#u8
D
INTE
E
RET1
E
BRA
label9
D
BNO
label9
D
BEQ
label9
D
BNE
label9
D
BC
label9
D
BNC
label9
D
BN
label9
D
BP
label9
D
BV
label9
D
BNV
label9
D
BLT
label9
D
BGE label9
D
BLE
label9
D
BGT label9
D
BLS
label9
D
BHI
label9
D
Notes:
•
2/1 in the number of CYCLEs indicates 2 for a branch and 1 for no branch.
•
The assembler performs calculations as shown below and sets values in the rel11 and rel8 fields of the
hardware specifications: (label12-PC-2)/2 --> rel11 and (label9-PC-2)/2 --> rel8. label12 and label9 are
signed operands.
•
To execute the RETI instruction, the S flag must be 0.
478
OP
CYCLE
NZVC
97-0
2
----
D0
2
----
97-1
2
----
97-2
2
----
1F
3+3a
----
9F-3
3+3a
----
97-3
2+2a
CCCC
E0
2
----
E1
1
----
E2
2/1
----
E3
2/1
----
E4
2/1
----
E5
2/1
----
E6
2/1
----
E7
2/1
----
E8
2/1
----
E9
2/1
----
EA
2/1
----
EB
2/1
----
EC
2/1
----
ED
2/1
----
EE
2/1
----
EF
2/1
----
Operation
Rj --> PC
PC+2 --> RP,
PC+2+(label12-PC-2) --> PC
PC+2 --> RP ,Ri --> PC
RP --> PC
SSP-=4,PS --> (SSP),
SSP-=4,PC+2 --> (SSP),
0 --> I flag, 0 --> S flag
(TBR+0x3FC-u8 x 4) --> PC
SSP-=4,PS --> (SSP),
SSP-=4,PC+2 --> (SSP),
0 --> S flag
(TBR+0x3D8) --> PC
(R15) --> PC,R15-=4,
(R15) --> PS,R15-=4
PC+2+(label9-PC-2) --> PC
No branch
if(Z==1) then
PC+2+(label9-PC-2) --> PC
s/Z==0
s/C==1
s/C==0
s/N==1
s/N==0
s/V==1
s/V==0
s/V xor N==1
s/V xor N==0
s/(V xor N) or Z==1
s/(V xor N) or Z==0
s/C or Z==1
s/C or Z==0
Remarks
-
-
Return
For the emulator
-
-
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