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4.3.6
Area Mode Register 5 (AMD5)
This register specifies the operating mode of chip select area 5 (specified by ASR5 and
AMR5).
I Area mode register 5 (AMD5)
The configuration of Area mode register 5 (AMD5) is as follows:
AMD5
Address
: 000624
H
Each bit has the same meaning as the corresponding bit of AMD4.
See Section 4.3.5 "Area Mode Register 4 (AMD4)".
7
6
5
DRME
4
3
2
BW1
BW0
WTC2
WTC1
CHAPTER 4 BUS INTERFACE
Initial value
1
0
0--00000
WTC0
Access
R/W
109
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