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CHAPTER 8 PPG TIMER
8.3.3
PWM duty set register (PDUT)
The PDUT is a register for setting duties. It has a buffer. Transfers from the buffer are
performed through counter borrows.
I PWM duty set register (PDUT)
The register configuration of the PDUT is shown below.
PDUT
Address: ch0 00009C
ch1 0000A4
ch2 0000AC
ch3 0000B4
ch4 0000BC
ch5 0000C4
This register is write-only.
Initial value is undefined.
If the same value is written to the PCSR and PDUT, all-high is output for normal polarity and all-
low is output for reverse polarity.
Note:
•
Do not set values so that the condition PCSR < PDUT would be met. Otherwise, the PWM
output becomes undefined.
•
This register must be accessed in 16-bit mode.
210
bit
15
14
H
H
7
H
H
H
H
13
12
11
10
6
5
4
9
8
3
2
1
0
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