Overview Of 8/16-Bit Up/Down Counter/Timer - Fujitsu MB91150 Series Hardware Manual

32-bit microcontroller
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CHAPTER 6 8/16-BIT UP/DOWN COUNTER/TIMER
6.1

Overview of 8/16-Bit Up/Down Counter/Timer

The 8/16-bit up/down counter/timer consist of six event input pins, two 8-bit up/down
counters, two 8-bit reload/compare registers, and their control circuits.
I Characteristics of the 8/16-bit up/down counter/timer
With the 8-bit count register, counting can be performed in a range between 0 and 255
(decimal numbers). In 16-bit x 1 operation mode, counting can be performed in a range
between 0 and 65535 (decimal numbers).
The following four count modes can be selected for the count clock:
Timer mode
Up/down counter mode
Phase difference count mode (multiply-by-2)
Phase difference count mode (multiply-by-4)
In timer mode, one of the following internal clocks can be selected for the count clock during
33.3 MHz operation:
60nS (16.67MHz:1/2 division)
240nS (4.17MHz:1/8 division)
The detection edge of the external pin input signal can be selected in up and in down
counting mode.
Detection of trailing edges
Detection of leading edges
Detection of both trailing and leading edges
Edge detection disabled
The phase difference counting mode is suitable for counting for an encoder, such as for a
motor. Using one of A phase output, B phase output, and Z phase output as input allows to
count rotation angle and number of rotations easily and with high precision.
Two different functions can be selected for the ZIN pin (this applies for all modes).
Counter clear function
Gate function
The compare function and reload function are available. These functions can be used
separately or combined. By combining these functions, counting up or down can be
performed with an arbitrary width.
Compare function (compare interrupt request output)
Compare function (compare interrupt request output, and counter clearing)
Reload function (underflow interrupt request output, and reloading)
Compare and reload function (compare interrupt request output, counter clearing,
underflow interrupt request output, and reloading)
Compare and reload disabled
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