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CHAPTER 17 DMA CONTROLLER
I Transfer termination in continuous transfer mode (when both addresses are changed), 16/8-bit data
❍ Transfer source area: External, Transfer destination area: External
CLK
DREQn
Addr pin
Data pin
RD
WRn
DACK
DEOP
❍ Transfer source area: External, Transfer destination area: Internal RAM
CLK
DREQn
Addr pin
Data pin
RD
WRn
DACK
DEOP
❍ Transfer source area: Internal RAM, Transfer destination area: External
CLK
DREQn
Addr pin
Data pin
RD
WRn
DACK
DEOP
390
D
S
D
S
W
S
S
S
D
D
D
#0H
D
D
D
#0H
W
W
W
#1H
D
#0H
#1H
D
#0H
W
W
W
#0H
#1H
S
#0H
#1H
W
W
#1H
#1L
#2H
#1H
#1L
#2H
W
W
W
#1L
#2H
#2L
#1L
#2H
#2L
W
W
W
#1L
#2H
#2L
#1L
#2H
#2L
W
W
W
#2L
#2L
W
W
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