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CHAPTER 9 MULTIFUNCTIONAL TIMER
9.1
Overview of Multifunctional Timer
The multifunctional timer consists of the following elements:
• 16-bit free-run timer,
• eight 16-bit output compares,
• eight 16-bit output compares,
• 16-bit PPG timer with 6 channels.
This function enables output of waveforms based on the 16-bit free-run timer, as well
as measuring the width of input pulses and the external clock cycle.
I Configuration of the multifunctional timer
❍ 16-bit free-run timer (x1)
The 16-bit free-run timer consists of a 16-bit up counter, control register, 16-bit compare clear
register, and pre-scaler. The output values of this counter are used as a base timer for output
compare and input capture operations.
•
The user can select a counter operating clock of eight clocks.
Eight internal clocks (φ, φ/2, φ/4, φ/8, φ/16, φ/32, φ/64, and φ/128)
φ: Machine clock
•
An interrupt can be generated as result of an overflow or compare match with the compare
clear register. (For the compare match, a mode must be set.)
•
The counter value can be initialized to 0000
with the compare clear register.
❍ Output compare (x8)
An output compare consists of eight 16-bit compare registers, a latch for compare output, and a
control register. When a 16-bit free-run timer value matches a compare register value and the
output level is reversed, interrupts can be generated at the same time.
•
Eight compare registers can be operated independently. The output compare has an output
pin and interrupt flag for each of the compare registers.
•
Two compare registers can be paired to control output pins in the sense that two compare
registers are used to reverse the output pins.
•
The user can set initial values for the output pins.
•
An interrupt can be generated by a compare match.
❍ Input capture (x4)
An input capture consists of four independent external input pins, the corresponding capture
register, and a control register. When the edge of a signal input from an external input pin is
detected, a 16-bit free-run timer value can be stored in the capture register and an interrupt can
be generated at the same time.
•
The user can select the significant edges (rising edge, falling edge, and both edges) of
external input signals.
226
by reset, software clear, and a compare match
H
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