Block Diagram Of Basic I/O Port - Fujitsu MB91150 Series Hardware Manual

32-bit microcontroller
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5.2

Block Diagram of Basic I/O Port

This section provides a block diagram of a basic I/O port.
I Block diagram of basic I/O port
Figure 5.2-1 "Block diagram of I/O ports" shows the basic configuration of the I/O ports.
Data Bus
PDR read
I/O ports contain a port data register (PDR) and a data direction register (DDR).
Input mode (DDR = 0):
PDR read: The level of the corresponding external pin is read.
PDR write: The setting value is written to the PDR.
Output mode (DDR = 1):
PDR read: The value of the PDR is read.
PDR write: The value of the PDR is output to the corresponding pin.
The ports that have these functions are P20 to P27, P30 to P37, P40 to P47, P50 to P57, P80 to
P86, PE0 to PE7, PF0 to PF4, PG0 to PG5, PK0 to PK7, and PL0 to PL7.
Note:
The analog input control register of port-K (AICK) is used for control of switching between
using the analog pins (A/D) as resources or ports. AICK controls whether port K is used for
analog input or as general-purpose port.
0: General-purpose port
1: Analog input (A/D)
Figure 5.2-1 Block diagram of I/O ports
Resource output
Resource output
enabled
CHAPTER 5 I/O PORTS
Resource input
PDR : Port Data Register
DDR : Data Direction Register
pin
151

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