8/10-Bit A/D Converter Block Diagram - Fujitsu MB91150 Series Hardware Manual

13.2 8/10-bit A/D Converter Block Diagram

Figure 13.2-1 "8/10-bit A/D converter block diagram" is a block diagram of the 8/10-bit
A/D converter.
I 8/10-bit A/D converter block diagram
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
The function of each block is as follows.
❍ A/D control status registers (ADCS1, ADCS2)
The A/D control status registers can be used for starting conversion via software, selecting a
start trigger, selecting a conversion mode, selecting an A/D conversion channel, and enabling/
disabling interrupt requests. Moreover, they can be used for checking the state of interrupt
requests, and indicating that the converter is temporarily stopped or converting signals.
❍ A/D data register (ADCR)
Stores the result of A/D conversion. This register also selects the resolution of A/D conversion.
❍ Clock selector
Selects an A/D conversion start clock. 16-bit reload timer channel 2 output or external pin trigger
can be selected for the start clock.
Figure 13.2-1 8/10-bit A/D converter block diagram
MPX
Sampling and holding circuit
16-bit reload timer 2
External pin trigger
CHAPTER 13 8/10-BIT A/D CONVERTER
AVR AV
AV
SS
D/A converter
Successive appro
-ximation register
Comparator
Data register
ADCR
A/D control register 1
A/D control register 2
ADCS1, 2
Operation clock
Prescaler
SS
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