Counter Operation States - Fujitsu MB91150 Series Hardware Manual

32-bit microcontroller
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7.6

Counter Operation States

The state of the counter depends on the CNTE bit of the control register and the WAIT
signal generated internally. The states that can be set are the stop state (STOP state)
for CNTE = 0 and WAIT = 1, the start trigger waiting state (WAIT state) for CNTE = 1 and
WAIT = 1, and the operational state (RUN state) for CNTE = 1 and WAIT = 0.
I Counter operation states
Figure 7.6-1 "State transition" shows the transitions between these states.
Reset
WAIT
Counter retains value stored
when it stops.
Counter value is undefined until
loaded after reset.
Figure 7.6-1 State transition
STOP
Counter retains value stored
when it stops.
Counter value after reset is
undefined.
CNTE='1'
TRG='0'
CNTE=1,WAIT=1
RELD UF
TRG='1'
LOAD
CNTE=1,WAIT=0
Value in reload register is loaded
into counter
CHAPTER 7 16-BIT RELOAD TIMER
State transition through hardware
State transition through register access
CNTE=0, WAIT=1
CNTE='1'
TRG='1'
RUN
Counter is operating.
TRG='1'
CNTE=1,WAIT=0
RELD UF
Load completed
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