Fujitsu MB91150 Series Hardware Manual page 465

Table B-1 Interrupt vectors (Continued)
Interrupt source
Undefined instruction exception
System-reserved
External interrupt 0
External interrupt 1
External interrupt 2
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
External interrupt 7
External interrupts 8 to 15
System-reserved
UART0 (reception completed)
UART1 (reception completed)
UART2 (reception completed)
UART3 (reception completed)
System-reserved
UART0 (transmission completed)
UART1 (transmission completed)
UART2 (transmission completed)
UART3 (transmission completed)
2
I C
DMAC (ended with error)
Reload timer 0
Reload timer 1
Reload timer 2
Reload timer 3
System-reserved
A/D (successive type)
PPG0
Interrupt number
Decimal Hexadeci
notation mal
14 0E
15 0F
16 10
17 11
18 12
19 13
20 14
21 15
22 16
23 17
24 18
25 19
26 1A
27 1B
28 1C
29 1D
30 1E
31 1F
32 20
33 21
34 22
35 23
36 24
37 25
38 26
39 27
40 28
41 29
42 2A
43 2B
APPENDIX B Interrupt Vectors
Interrupt
Offset
level
- 3C4
H
- 3C0
H
ICR00 3BC
H
ICR01 3B8
H
ICR02 3B4
H
ICR03 3B0
H
ICR04 3AC
H
ICR05 3A8
H
ICR06 3A4
H
ICR07 3A0
H
ICR08 39C
H
- 398
H
ICR10 394
H
ICR11 390
H
ICR12 38C
H
ICR13 388
H
- 384
H
ICR15 380
H
ICR16 37C
H
ICR17 378
H
ICR18 374
H
ICR19 370
H
ICR20 36C
H
ICR21 368
H
ICR22 364
H
ICR23 360
H
ICR24 35C
H
- 358
H
ICR26 354
H
ICR27 350
H
TBR default
address
000FFFC4
H
000FFFC0
H
000FFFBC
H
000FFFB8
H
000FFFB4
H
000FFFB0
H
000FFFAC
H
000FFFA8
H
000FFFA4
H
000FFFA0
H
000FFF9C
H
000FFF98
H
000FFF94
H
000FFF90
H
000FFF8C
H
000FFF88
H
000FFF84
H
000FFF80
H
000FFF7C
H
000FFF78
H
000FFF74
H
000FFF70
H
000FFF6C
H
000FFF68
H
000FFF64
H
000FFF60
H
000FFF5C
H
000FFF58
H
000FFF54
H
000FFF50
H
449