Little-Endian Register (Ler) - Fujitsu MB91150 Series Hardware Manual

32-bit microcontroller
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4.3.9

Little-endian Register (LER)

The MB91150 ordinarily accesses the bus while treating all areas as big- endian areas.
However, making the required settings in this register enables one of the areas 1 to 5
to be treated as a little-endian area.
Note that area 0 cannot be treated as a little-endian area.
This register can be written only once after the system is reset.
I Little-endian register (LER)
The configuration of Little-endian register (LER) is as follows:
LER
Address
: 0007FE
H
[Bits 2 to 0]: LE2 to LE0
As listed in Table 4.3-1 "Mode Setting by the Combination of the LE2, LE1, and LE0 Bits", a
little-endian area is specified by the combination of the LE2, LE1, and LE0 bits.
Table 4.3-1 Mode Setting by the Combination of the LE2, LE1, and LE0 Bits
LE2
0
0
0
0
1
1
MODR (MODe Register)
For the mode register (MODR), see Section 3.10 "Operation Mode".
7
6
5
LE1
LE0
0
0
0
1
1
0
1
1
0
0
0
1
4
3
2
LE2
LE1
Initial value after reset. No little-endian area is set.
Area 1 is set as a little-endian area and areas 0 and
2 to 5 are set as big-endian areas.
Area 2 is set as a little-endian area and areas 0, 1,
and 3 to 5 are set as big-endian areas.
Area 3 is set as a little-endian area and areas 0 to 2,
4, and 5 are set as big-endian areas.
Area 4 is set as a little-endian area and areas 0 to 3,
and 5 are set as big-endian areas.
Area 5 is set as a little-endian area and areas 0 to 4
are set as big-endian areas.
CHAPTER 4 BUS INTERFACE
Initial value
1
0
-----000
LE0
Mode
Access
W
113

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