Table of Contents
Advertisement
CHAPTER 15 UART
❍ Initialization
The setting values of each control register in synchronous mode are shown below.
[Mode register (SMR0-3)]
- MD1, MD0: 10
- CS2, CS1, CS0: Specify the clock selector clock input.
- SCKE: 1 for the dedicated baud-rate generator or internal timer, and 0 for the clock output
and external clock (clock input)
- SOE: 1 for sending and 0 for receive-only
[Control register (SCR0-3)]
- PEN: 0
- P, SBL, and A/D: These bits have no effect.
- CL: 1 (8-bit data)
- REC: 0 (To initialize, the error flag is cleared.)
- RXE, TXE: At least one of these must be 1.
[Status register (SSR0-3)]
- RIE: 1 for using interrupts and 0 for not using interrupts
- TIE: 0
❍ Start of communication
Communication starts by writing to the output-data register (SODR0-3). Note that this applies
even to communication for receiving: In this case, dummy data must be written to SODR0-3.
❍ End of communication
When sending or receiving of the data for one frame terminates, the RDRF flag of the status
register (SSR0-3) is set to 1. For receiving, check the overrun error flag bit (SSR0-3: ORE) and
determine whether communication was performed normally.
340
B
Advertisement
Table of Contents
