Fujitsu MB91150 Series Hardware Manual page 101

I Reference chart for the clock system
16.5MHz
Oscillation input
PLL
VSTP
CHAPTER 3 MEMORY SPACE, CPU AND CONTROL UNIT
Figure 3.11-10 Reference chart for the clock system
Divided-by-2
system input
1/2
PLL system input
1/2 SLCT0
33MHz
1x
1/2 01
16.5MHz
00
1/2
8. . 25 MHz
PCTR register
CHC CCK1,0 DBLON
1 1/1
0 1/2
1/4
1/8
CPU system gear
Peripheral system gear
PCK1,0
1/1
1/2
1/4
1/8
GCR register
CPU system
Bus system
Peripheral system
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