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CHAPTER 21 FLASH MEMORY
21.6.2 Writing data to flash memory
This section describes how to write data to the flash memory by issuing the Write
command.
I Writing data to the flash memory
The automatic algorithm for writing flash memory data can be activated by continuously issuing
the Write command (see Table 21.4-1 "Command sequence") to target sectors in the flash
memory. When data writing at the target address of the 4th cycle terminates, the automatic
algorithm is activated and then automatic writing starts.
I Address specification method
Only an even address can be specified in a data write cycle as a write address. Specifying an
even address does not assure correct data writing. That is, data writing at even addresses in
half word data units becomes necessary.
Data can be written in any order of address as well as beyond a sector boundary. However, only
one half word data item can be written per Write command.
I Note on writing data to the flash memory
Data unit 0 cannot be returned to data unit 1 by a write operation. If data unit 1 is written in data
unit 0, the flash memory element is determined to be faulty because the data polling algorithm
or toggle operation does not terminate and the timing limit excess flag is determined to be
abnormal because the defined time for the write operation is exceeded. Alternatively, it may only
appear as if data unit 1 has been written. If data is read in the reset/read status, however, data
unit 0 remains as is. Only in an erase operation can data unit 0 be changed to data unit 1. All
other commands are ignored during execution of the automatic write operation. Note that if
hardware reset is activated during the write operation, the integrity of written address data
cannot be guaranteed.
I Procedure for flash memory write
Figure 21.6-1 "Example of flash memory write procedure" shows an example for the procedure
of flash memory write. Using hardware sequence flags enables to determine the automatic
algorithm status in flash memory. Here, the data polling flag (DPOLL) is used to check for the
end of writing.
Data for the flag check is read from the last written address.
The data polling flag (DPOLL) changes simultaneously when the timing limit excess flag
(TLOVER) changes. For this reason, even if (TLOVER) is 1, the data polling flag bit (DPOLL)
must be rechecked.
At the same time at which (TLOVER) changes to 1, the toggle-bit flag (TOGGLE) also stops the
toggle operation. For this reason, (TOGGLE) must be rechecked.
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