Operation Of Data Transfer Of 16-Bit Mpg Output Data Register (Upper/Lower) - Fujitsu MB95630H Series Hardware Manual

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CHAPTER 21 MULTI-PULSE GENERATOR
21.5 Operations
21.5.4
Operation of Data Transfer of 16-bit MPG Output
Data Register (Upper/Lower)
Eight methods can be used to transfer data from the 16-bit MPG output data
buffer register (upper/lower) (OPDBRHx/OPDBRLx) to the 16-bit MPG output
data register (upper/lower) (OPDUR/OPDLR) automatically, which are described
in the following section. Each method is selected by setting the OPS[2:0] bits in
the 16-bit MPG output control register (upper) (OPCUR).
■ Operation of Data Transfer of Output Data Register
There are eight methods of data transfer from 16-bit MPG output data buffer register (upper/
lower) (OPDBRHx/OPDBRLx) to the 16-bit MPG output data register (upper/lower)
(OPDUR/OPDLR):
• Write values to OPDBRH0 and OPDBRL0
• 16-bit Reload Timer Underflow
• Position Detection
• Position Detection and 16-bit Reload Timer Underflow
• Position Detection or 16-bit Reload Timer Underflow
• One-shot Position Detection
• One-shot Position Detection and 16-bit Reload Timer Underflow
• One-shot Position Detection or 16-bit Reload Timer Underflow
The value of the 16-bit MPG output data buffer register (upper/lower) (OPDBRHx/OPDBRLx)
that is selected by the BNKF bit and RDA[2:0] bits in the 16-bit MPG output data register
(upper) (OPDUR) is transferred to the 16-bit MPG output data register (upper/lower) (OPDUR/
OPDLR) when the write signal is generated from the Data Write Control Circuit. However, at
the time when OPS[2:0] = 0b000, the value of OPDBRH0 and OPDBRL0 is always transferred
to the 16-bit MPG output data register (upper/lower) (OPDUR/OPDLR) in spite of the value of
BNKF bit and RDA[2:0] bits. Figure 21.5-2 shows structure between OPDBRHx/OPDBRLx
and OPDUR/OPDLR.
Note:
When the data transfer method is changed, the next 16-bit MPG output data buffer
register to be selected is always specified by the BNKF bit and the RDA[2:0] bits in the
16-bit MPG output data register (upper). This does not apply to the OPDBRH0 and
OPDBRL0 write method. In this write method, the BNKF bit and the RDA[2:0] bits are
ignored.
Always use the word access instruction to access OPDUR/OPDLR.
402
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
MN702-00009-1v0-E

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