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CHAPTER 16 I
C INTERFACE
❍ Arbitration
When more than one master transmits data at the same time, arbitration starts. When the data
to be transmit is 1, and the data on the SDA line is at the "L-level", the master sets AL=1,
assuming that it has lost the arbitration. If an attempt is made to generate a start condition when
the bus is used as described above, AL=1 is set. When AL=1 is set, MSS=0 and TRX=0 are set
and slave receive mode is entered.
❍ Acknowledge
Acknowledge is transmitted from the receiving unit to the transmitting unit. At the time of data
reception, reception with or without Acknowledge can be selected by the ACK bit. At the time of
data transmission, an Acknowledge from the receiving side is stored in the LRB bit.
When the receiving mast does not receive Acknowledge during transmission from the slave,
TRX=0 is set and the slave is put in receive mode. This allows the master to generate a stop
condition when the slave releases the SCL line.
❍ Bus error
When one of the following conditions is met, a bus error is assumed and the I
stopped.
•
Detection of violation of basic rules on the I
bit)
•
Detection of stop conditions in master mode
•
Detection of violation of basic rules on the I
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C bus during data transfer (including the ACK
2
C bus in bus idle state
2
C interface is
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