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17.7.3 Timing charts for transfer termination in continuous
transfer mode
This section covers timing charts for transfer termination in continuous transfer mode.
I Transfer termination in continuous transfer mode (when either address is fixed), 16/8-bit data
❍ Transfer source area: External, Transfer destination area: External
CLK
DREQn
Addr pin
Data pin
RD
WRn
DACK
DEOP
❍ Transfer source area: External, Transfer destination area: Internal RAM
CLK
DREQn
Addr pin
Data pin
RD
WRn
DACK
DEOP
❍ Transfer source area: Internal RAM, Transfer destination area: External
CLK
DREQn
Addr pin
Data pin
RD
WRn
DACK
DEOP
D
S
D
S
W
S
S
D
D
D
D
D
D
W
W
W
CHAPTER 17 DMA CONTROLLER
D
#0H
#1/2H
D
#0H
#1/2H
W
W
W
S
#0H
S
#0H
W
#0H
#1/2H
#1/2L
#0H
#1/2H
#1/2L
W
W
W
#1/2L
#1/2L
W
#1/2H
#1/2L
#1/2H
#1/2L
W
W
389
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