Operation Mode - Fujitsu MB91150 Series Hardware Manual

3.10 Operation Mode

The FR Series controls the operation mode using the mode pins (MD2, 1, 0) and mode
register (MODR).
I Operation mode
Two operation modes, bus mode and access mode, are used.
❍ Bus mode
In bus mode, the FR Series controls the operations of the internal ROM and external access
function. The mode setting pins (MD2, 1, 0) and the M1 and M0 bits of the mode register
(MODR) are used to specify the bus mode.
❍ Access mode
In access mode, the FR Series controls the width of the external data bus. The mode setting
pins (MD2, 1, 0) and BW1 and BW0 bits of AMD0, AMD1, AMD32, AMD4, and AMD5 address
mode registers are used to specify the access mode.
I Mode pins
Three pins MD2, MD1, and MD0 are used to specify operation modes as shown in Table 3.10-1
"Mode pins used to set modes".
Table 3.10-1 Mode pins used to set modes
Mode pin
MD2 MD1 MD0
0 0 0
0 0 1
0 1 0
0 1 1
1 - -
Bus mode
Single chip
Internal ROM external bus
External ROM external bus
Mode name
External vector mode 0
External vector mode 1
External vector mode 2
Internal vector mode
-
CHAPTER 3 MEMORY SPACE, CPU AND CONTROL UNIT
Access mode
32-bit bus
16-bit bus
8-bit bus
Reset
vector Width of external
access data bus
area
External 8 bits
External 16 bits
External 32 bits
Internal (Mode register)
- -
External ROM external
bus mode
Cannot be used in this
model
Single chip mode
Cannot be used
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