Fujitsu MB91150 Series Hardware Manual page 469

I Pin status in each CPU state
Table C-2 Pin status in 16-bit mode of the external bus
Pin
Function In sleep mode
name
P20-7 D16-23
Output retained
or Hi-Z
P30-7 D24-31
P40-7 A0-7
Output retained
(Address output)
P50-7 A8-15
P: Last status
retained
P60-7 A16-23
F: Address
output
P: Last status
P80 RDY retained
F: RDY input
P: Last status
P81 BGRNT retained
F: H output
P: Last status
P82 BRQ retained
F: BRQ input
P83 RD
Last status
retained
P84 WR0
P85 P: Last status
WRI retained
F: H output
P: Last status
P86 CLK retained
F: CLK output
PC0-3 INT0-3 Last status
retained
PC4 INT4/CS0 P: Last status
retained
PC5-7 INT5-7/CS1-3
F: CS output
PD0 AIN0/INT8 Last status
retained
PD1 BIN0/INT9
PD2 AIN1/INT10
PD3 BIN1/INT11
PD4 ZIN0/INT12
PD5 ZIN1/INT13
PD6 DEOP2/INT14
/INT15
PD7 ATG
In stop mode
HIZX=0 HIZX=1
Output Hi-Z or
Output retained
keep the input at
or Hi-Z
0
Output retained
(Address output)
P: Last status
retained
F: Address
output
Last status
retained or keep
the input at 0
Input enabled Input enabled
Output Hi-Z
Input enabled
Input enabled
APPENDIX C Pin Status in Each CPU State
Bus release
(BGRNT=1)
Output Hi-Z Output Hi-Z or
enable all-pin
input
FF
P: Last status Output Hi-Z or
retained enable all-pin
F: RDY input input
L output
BRQ input
Output Hi-Z H output
CLK output CLK output
Last status Output Hi-Z or
retained enable all-pin
input
Last status CS output
retained (Hi-Z
for CS output)
Last status Output Hi-Z or
retained enable all-pin
input
At reset
Remarks
(RST=1)
-
output
H
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