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CHAPTER 13 8/10-BIT A/D CONVERTER
8/10-bit A/D converter pin block diagram
Figure 13.3-1 "Block diagram of the pins PK0/AN0 to PK7/AN7" is a block diagram of the 8/10-
bit A/D converter pins.
Figure 13.3-1 Block diagram of the pins PK0/AN0 to PK7/AN7
AICK
PDR (port data register)
PDR read
PDR write
DDR (port direction register)
DDR write
DDR read
Notes:
•
For the pins to be used as input ports, set the DDRK register bits corresponding to these
pins to 0 and apply pull-up resistance to the external pin. Also, set the AICK register bits
corresponding to the pins to 0 as well.
•
For pins to be used as analog input pins, set the AICK register bits corresponding to these
pins to 1 as well. The value that is read from the PDRK register at this time is 0.
280
Output
latch
Direction
latch
Analog input
Standby control (HIZX = 1)
Pin
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