Supported Power-Up Voltage Sequence For The Intel ® Itanium ® Processor 9500 Series; Supported Power-Up Sequence Timing Requirements For Intel® Itanium® Processor 9500 Series - Intel BX80569Q9550 - Core 2 Quad 2.83 GHz Processor Datasheet

Electrical Specifications
2.11.2 Supported Power-up Voltage Sequence for the Intel
Itanium
Figure 2-18. Supported Power-up Sequence Timing Requirements for Intel® Itanium®
Processor 9500 Series
VCCSTBY33
(3.3V)
PROCTYPE
VCC (12V)
VCCA
(1.8V)
VCCIO
VR_PROCTYPE
SYSCLK
(133MHz)
VROUTPUT_ENABLE0
SVID
All inputs low prior to VCCIO
VCCUNCORE
VCCVUNCOREREADY
VCCCORE[1-4]
VR_READY
PWRGOOD
RESET_N
® ®
Intel Itanium Processor 9300 Series and 9500 Series Datasheet
®
Processor 9500 Series
>0us
Pulled to 3.3VSM pin on platform
>= 0us
>= 0us
Pulled to Ararat's internal 3.3V rail on Ararat itself
> 0us
> 0us
> 100ms
> 1 ms
svids change
to hfuse values
Vstrap
Vhfuse
1V
0.9V
V=hfuse
<200ms
<=1000ms
®
svid_vcccore
svid changes
may change in
to vfuse
response to
values
power
manager
V=vfuse
Pwrgd reset can change core VR set
>0us ≥15ms
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