Power Delivery Example - Intel Pentium M Processor Design Manual

Figure 127.

Power Delivery Example

Intel®
Voltage
IMVP-IV
Regulator
Vcc_core
0.7 - 1.708 V
32 A
VCCP =1.05V
VCCP
2.5A
0.90 - 1.05 V
2.5 A
+12V
WTX
1.8 V
Power
11.63 A
Supply
+5V
+3.3V
+3.3Vsb
+5Vsb
Vdd
(Clock Core)
C
3.3V
K
Ivdd(max) = 280mA
4
0
8
B
VddA
(I/O)
3.3V
IvddA(max) = 280mA
Vcc
(HI I/O & Core)
1.8 V
Icore(max) = 2.66 A
Intel®
Vcc3.3
P64H2
(PCI.X I/O)
3.3 V
Ivcc3.3(max) = 1.3 A
Vcc
(HI I/O & Core)
1.8 V
Icore(max) = 2.66 A
Vcc3.3
P64H2
(PCI.X I/O)
3.3 V
Ivcc3.3(max) = 1.3 A
NOTE: The examples given in this Design Guide are only examples. Many power distribution methods achieve similar results. It
is critical, when deviating from these examples in any way, to consider the effects of the change.
Design Guide
® ®
Intel Pentium
Vcc_core
Processor
0.7 - 1.708 V 32 A
VCCP
(CPU I/O)
Voltage = 1.05 V
Ivccp Icore(max) = 2.5 A
Vtt
(System Bus Termination)
Voltage = 1.05 V
Ivtt (max) = 2.0A
Vcore
1.2 V
(Core Logic)
1.2 V
4.5 A
Icore(max) = 3.1 A
Vref(A & B)
1.25 V
Iref = 4.2 mA
Vddr
(DDR I/O)
2.5 V
Iddr(max) = 6.8 A
3.3 Vsb
64 mA
1.8 Vsb
14.01 mA
Vcc
(HI I/O & Core)
1.8 V
+5 V
Icore(max) = 2.66 A
P64H2
Vcc3.3
(PCI.X I/O)
+5 VSB
3.3 V
Ivcc3.3(max) = 1.3 A
M Processor and Intel
Platform Power Delivery Guidelines
D
D
R
(A)
2.5A
2.5 V
26 A
Vcc_1.8
(Core Logic) 1.8 V
Icc_1.8(max) = 550 mA
Vcc_3.3
(Core Periphery) 3.3 V
Icc_3.3(max) = 420 mA
VccSus_3.3
(Resume I/O) 3.3 V
IccSus_3.3(max) = 14.01 mA
VccSus_1.8
(Resume Logic) 1.8 V
IccSus_1.8(max) = 64 mA
VcpuIO
(CPU CMOS I/O)
VccP (1.05V)
IcccpuIO(max) = 45 mA IVCCP
VccRTC (RTC)
2.0 V - 3.3 V (Battery)
IccRTC(max) = 4 µA
5VRef
5 V
IccV5Ref(max) = 10 µA
5 VrefSus
5 VSB
IccV5RefSu(max) = 10 µA
®
E7501 Chipset Platform
Vdd Vdd
(Core) (Core)
2.5 V 2.5 V
Ivdd(max) = Ivdd(max) =
10.0 A 10.0 A
Vtt Vtt
VttB
D
1.25 V 1.25 V
D
Ivterm(max) = R Ivterm(max) =
(B)
6.25 A 6.25 A
Vref Vref
1.25 V 1.25 V
Iref = 8µA Iref = 8µA
VttA
VrefB
VrefA
1.25 V
12.5 A
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