Figure 16.5 Example Of Transmission Operation - Hitachi H8S/2628 Hardware Manual

(1) When 8-bit data length is selected (SSTDR0 is valid) with CPOS = 0 and CPHS = 0
SSCK
Bit Bit
SSO
0
SSTDR0 (LSB first transmission)
TDRE
TEND
LSI operation
TXI
interrupt
User operation
generated
Data written to
SSTDR0
(2) When 16-bit data length is selected (SSTDR0 and SSTDR1 are valid) with CPOS = 0 and CPHS = 0
SSCK
SSO
Bit Bit
0
(LSB first)
SSO
Bit Bit
7
(MSB first)
TDRE
TEND
LSI operation
User operation
Data written to
SSTDR0 to SSTDR1
(3) When 32-bit data length is selected (SSTDR0 and SSTDR3 are valid) with CPOS = 0 and CPHS = 0
SSCK
SSO
Bit
to
(LSB first)
0
SSTDR3
SSO
Bit
to
(MSB first)
7
SSTDR0
TDRE
TEND
LSI operation
User operation
Data written to
SSTDR0 to SSTDR3

Figure 16.5 Example of Transmission Operation

1 frame
Bit Bit Bit Bit Bit Bit
1 2 3 4 5 6 7
TEI
interrupt
generated
Data written to
1 frame
Bit Bit Bit Bit Bit Bit Bit
1 2 3 4 5 6 7 0
SSTDR1
Bit Bit Bit Bit Bit Bit
Bit
6 5 4 3 2 1 0 7
SSTDR0
1 frame
Bit Bit Bit Bit Bit
to to
7 0 7 0 7
SSTDR2 SSTDR1
Bit Bit Bit Bit Bit
to to
0 7 0 7 0
SSTDR1 SSTDR2
TXI
interrupt
generated
1 frame
Bit Bit Bit Bit Bit Bit Bit
7 6 5 4 3 2 1
SSTDR0 (MSB first transmission)
TXI
interrupt interrupt
generated generated
SSTDR0
Bit Bit Bit Bit Bit Bit Bit
1 2 3 4 5 6 7
SSTDR0
Bit Bit Bit Bit Bit Bit Bit
6 5 4 3 2 1 0
SSTDR1
Bit Bit
to
0 7
SSTDR0
Bit Bit
to
7 0
SSTDR3
TEI
interrupt
generated
Rev. 1.0, 09/02, page 419 of 568
Bit
0
TEI