Register Descriptions; Standby Control Register (Sbycr) - Hitachi H8S/2628 Hardware Manual

21.1

Register Descriptions

Registers related to the power down mode are shown below. For details on the system clock
control register (SCKCR), refer to section 20.1.1, System Clock Control Register (SCKCR).
• System clock control register (SCKCR)

• Standby control register (SBYCR)

• Module stop control register A (MSTPCRA)
• Module stop control register B (MSTPCRB)
• Module stop control register C (MSTPCRC)
21.1.1 Standby Control Register (SBYCR)
SBYCR is an 8-bit readable/writable register that performs software standby mode control.
Bit Bit Name
7 SSBY
Rev. 1.0, 09/02, page 480 of 568
Initial Value R/W
0 R/W
Description
Software Standby
This bit specifies the transition mode after
executing the SLEEP instruction
0: Shifts to sleep mode when the SLEEP
instruction is executed
1: Shifts to software standby mode when the
SLEEP instruction is executed
This bit does not change when clearing the
software standby mode by using external interrupts
and shifting to normal operation. This bit should be
written with 0 when clearing.