Hitachi H8S/2628 Hardware Manual page 281

H8s/2628 series 16-bit single-chip microcomputer
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Initial
Bit
Bit Name
Value
7
CMIEB
0
6
CMIEA
0
5
OVIE
0
4
CCLR1
0
0
3
CCLR0
R/W
Description
R/W
Compare-Match Interrupt Enable B
Selects whether the CMFB interrupt request (CMIB)
is enabled or disabled when the CMFB flag in TCSR
is set to 1.
0: CMFB interrupt request (CMIB) is disabled
1: CMFB interrupt request (CMIB) is enabled
R/W
Compare-Match Interrupt Enable A
Selects whether the CMFA interrupt request (CMIA)
is enabled or disabled when the CMFA flag in TCSR
is set to 1.
0: CMFA interrupt request (CMIA) is disabled
1: CMFA interrupt request (CMIA) is enabled
R/W
Timer Overflow Interrupt Enable
Selects whether the OVF interrupt request (OVI) is
enabled or disabled when the OVF flag in TCSR is
set to 1.
0: OVF interrupt request (OVI) is disabled
1: OVF interrupt request (OVI) is enabled
R/W
Counter Clear 1 and 0
R/W
These bits select the method by which TCNT is
cleared
00: Clearing is disabled
01: Cleared on compare-match A
10: Cleared on compare-match B
11: Cleared on rising edge of external reset input
Rev. 1.0, 09/02, page 245 of 568

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