Section 11 8-Bit Timers; Features - Hitachi H8S/2628 Hardware Manual

This LSI has an on-chip 8-bit timer module with four channels operating on the basis of an 8-bit
counter.
The 8-bit timer module can be used to count external events and be used as a multifunction timer
in a variety of applications, such as generation of counter reset, interrupt requests, and pulse
output with an arbitrary duty cycle using a compare-match signal with two registers.
11.1

Features

• Selection of clock sources
Selected from three internal clocks (φ/8, φ/64, and φ/8192) and an external clock.
• Selection of three ways to clear the counters
The counters can be cleared on compare-match A or B, or by an external reset signal.
• Timer output controlled by two compare-match signals
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of pulse
output or PWM output with an arbitrary duty cycle.
• Cascading of the two channels
 Cascading of TMR_0 and TMR_1
The module can operate as a 16-bit timer using TMR_0 as the upper half and TMR_1 as
the lower half (16-bit count mode).
TMR_1 can be used to count TMR_0 compare-match occurrences (compare-match count
mode).
 Cascading of TMR_2 and TMR_3
The module can operate as a 16-bit timer using TMR_2 as the upper half and TMR_3 as
the lower half (16-bit count mode).
TMR_3 can be used to count TMR_2 compare-match occurrences (compare-match count
mode).
• Multiple interrupt sources for each channel
Two compare-match interrupts and one overflow interrupt can be requested independently.
• Generation of A/D conversion start trigger
Channel 0 compare-match signal can be used as the A/D conversion start trigger.
• Module stop mode can be set
At initialization, the 8-bit timer operation is halted. Register access is enabled by canceling the
module stop mode.
TIMH263A_000020020300

Section 11 8-Bit Timers

Rev. 1.0, 09/02, page 241 of 568