Table 15.3 Setting Range For Tseg1 And Tseg2 In Bcr - Hitachi H8S/2628 Hardware Manual

H8s/2628 series 16-bit single-chip microcomputer
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Time quanta (tq) is an integer multiple of the number of system clocks, and is determined by the
baud rate prescaler (BRP) as follows. f
tq = 2 × (BPR setting + 1)/f
The following formula is used to calculate the 1-bit time and bit rate.
1-bit time = tq × (3 + TSEG1 + TSEG2)
Bit rate = 1/Bit time
/{2 × (BPR setting + 1) × (3 + TSEG1 + TSEG2)}
= f
CLK
= φ (system clock)
Note:
f
CLK
A BCR value is used for BRP, TSEG1, and TSEG2.
Example: With a system clock of 24 MHz, a BRP setting of B'000000, a TSEG1 setting of
B'0101, and a TSEG2 setting of B'100:
Bit rate = 24/{2 × (0 + 1) × (3 + 5 + 4)} = 1 Mbps

Table 15.3 Setting Range for TSEG1 and TSEG2 in BCR

TSEG1
0011
(BCR11−BCR8)
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Note: The time quantum values for TSEG1 and TSEG2 are determined by TSEG value + 1.
* Settable when bits BRP13 to BRP8 are not B'000000.
Mailbox Transmit/Receive Settings: The HCAN has 16 mailboxes. Mailbox 0 is receive-only,
while mailboxes 1 to 15 can be set for transmission or reception. The initial status of mailboxes 1
to 15 is for transmission. Mailbox transmit/receive settings are not initialized by a software reset.
Rev. 1.0, 09/02, page 388 of 568
is the system clock frequency.
CLK
CLK
001
010
No
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
Yes*
Yes
TSEG2 (BCR14−BCR12)
011
100
No
No
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
101
110
111
No
No
No
No
No
No
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No

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