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16-Bit Timer Pulse Unit (TPU) .............. 159
Buffer Operation.............................. 204
Cascaded Operation ......................... 208
Free-running count operation .......... 198
Input Capture ................................... 201
periodic count operation .................. 198
Phase Counting Mode...................... 214
PWM Modes.................................... 209
Synchronous Operation ................... 203
toggle output .................................... 199
Waveform Output by Compare Match
......................................................... 199
8-Bit Timers............................................ 241
16-Bit Count Mode.......................... 255
Cascaded Connection....................... 255
Compare-Match Count Mode .......... 256
Pulse Output .................................... 251
TCNT Incrementation Timing ......... 252
Toggle output................................... 260
A/D Converter ........................................ 427
A/D Converter Activation................ 223
A/D trigger input ............................. 157
Conversion Time ............................. 435
External Trigger............................... 437
Scan Mode ....................................... 434
Single Mode..................................... 434
Address Map............................................. 51
Address Space........................................... 16
Addressing Modes .................................... 38
Absolute Address............................... 39
Immediate .......................................... 40
Memory Indirect ................................ 40
Program-Counter Relative ................. 40
Register Direct................................... 38
Register Indirect ................................ 38
Register Indirect with Displacement.. 38
Register Indirect with Post-Increment39
Register Indirect with Pre-Decrement 39
Bcc...................................................... 25, 34
Bit Rate ................................................... 386
Index
break address....................................... 85, 88
break conditions ........................................88
Bus Arbitration..........................................95
bus cycle....................................................93
Bus Masters...............................................95
Clock Pulse Generator ............................467
Condition Field .........................................37
Condition-Code Register (CCR) ...............20
CPU Operating Modes ..............................12
Advanced Mode .................................13
Normal Mode.....................................12
data direction register..............................121
data register .............................................121
Data Transfer Controller ...........................97
Activation by Software ....................116
Block Transfer Mode .......................111
Chain Transfer ......................... 112, 117
DTC Vector Table............................104
Normal Mode........................... 109, 116
Register Information ........................104
Repeat Mode ....................................110
software activation ...........................113
Software Activation .........................118
vector number for the software
activation interrupt ...........................103
Effective Address................................ 38, 41
Effective Address Extension .....................37
Exception Handling...................................53
Interrupts............................................58
Reset Exception Handling..................55
Stack Status........................................60
Traces.................................................58
Trap Instruction..................................59
Extended Control Register (EXR) ............19
Flash memory..........................................445
Flash Memory
Boot Mode .......................................456
Emulation.........................................459
Erase/Erase-Verify...........................463
erasing units .....................................450
Rev. 1.0, 09/02, page 565 of 568
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