Operation Timing; Input/Output Timing; Figure 10.30 Count Timing In Internal Clock Operation; Figure 10.31 Count Timing In External Clock Operation - Hitachi H8S/2628 Hardware Manual

10.8

Operation Timing

10.8.1

Input/Output Timing

TCNT Count Timing: Figure 10.30 shows TCNT count timing in internal clock operation, and
figure 10.31 shows TCNT count timing in external clock operation.
φ
Internal clock
TCNT
input clock
TCNT

Figure 10.30 Count Timing in Internal Clock Operation

φ
External clock
TCNT
input clock
TCNT

Figure 10.31 Count Timing in External Clock Operation

Output Compare Output Timing: A compare match signal is generated in the final state in
which TCNT and TGR match (the point at which the count value matched by TCNT is updated).
When a compare match signal is generated, the output value set in TIOR is output at the output
compare output pin. After a match between TCNT and TGR, the compare match signal is not
generated until the TCNT input clock is generated.
Figure 10.32 shows output compare output timing.
Rev. 1.0, 09/02, page 224 of 568
Falling edge
N-1 N
Falling edge
N-1 N
Rising edge
N+1
Rising edge Falling edge
N+1
N+2
N+2