Hitachi H8S/2628 Hardware Manual page 602

H8s/2628 series 16-bit single-chip microcomputer
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Program/Program-Verify................. 461
programming units........................... 450
Programming/Erasing in User Program
Mode................................................ 458
General Registers...................................... 18
HCAN............................................... 94, 355
11 consecutive recessive bits ........... 384
Arbitration field ....................... 391, 394
buffer segment ................................. 387
Configuration mode ......................... 384
Control field..................................... 391
Data field ......................................... 391
Data frame ....................................... 394
DTC Interface .................................. 401
HCAN Halt Mode............................ 399
HCAN Sleep Mode.......................... 396
mailbox ............................................ 380
Message Control (MC0 to MC15) ... 380
Message Data (MD0 to MD15) ....... 382
Message transmission cancellation.. 391
Message Transmission Method ....... 389
Remote frame .................................. 395
remote transmission request bit ....... 395
Unread message overwrite............... 395
input pull-up MOS .................................. 121
Instruction Set........................................... 25
Arithmetic Operations Instructions.... 28
Bit Manipulation Instructions ............ 32
Block Data Transfer Instructions....... 36
Branch Instructions............................ 34
Data Transfer Instructions ................. 27
Logic Operations Instructions............ 30
Shift Instructions................................ 31
System Control Instructions .............. 35
Interrupt Control Modes ........................... 76
Interrupt Controller ................................... 63
Interrupt Exception Handling Vector Table
.................................................................. 72
Interrupt Mask Bit..................................... 20
interrupt mask level .................................. 19
interrupt priority register (IPR)................. 63
Rev. 1.0, 09/02, page 566 of 568
Interrupts
ADI ..................................................437
CMIA...............................................257
CMIB ...............................................257
ERS0/OVR0.....................................400
NMI....................................................71
OVI ..................................................257
RM0 .................................................400
RM1 .................................................400
SLE0 ................................................400
SWDTEND......................................113
TCIU_1 ............................................222
TCIU_2 ............................................222
TCIU_4 ............................................222
TCIU_5 ............................................222
TCIV_0 ............................................222
TCIV_1 ............................................222
TCIV_2 ............................................222
TCIV_3 ............................................222
TCIV_4 ............................................222
TCIV_5 ............................................222
TGIA_0............................................222
TGIA_1............................................222
TGIA_2............................................222
TGIA_3............................................222
TGIA_4............................................222
TGIA_5............................................222
TGIB_0 ............................................222
TGIB_1 ............................................222
TGIB_2 ............................................222
TGIB_3 ............................................222
TGIB_4 ............................................222
TGIB_5 ............................................222
TGIC_0 ............................................222
TGIC_3 ............................................222
TGID_0............................................222
TGID_3............................................222
WOVI ..............................................288
MAC instruction .......................................49
memory cycle............................................93
Multiply-Accumulate Register (MAC) .....21
On-Board Programming..........................455
open-drain control register ......................121

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