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Bit
Bit Name
5
TME
4,
3
2
CKS2
1
CKS1
0
CKS0
Note:* Only 0 can be written, for flag clearing.
Initial Value
R/W
0
R/W
All 1
0
R/W
0
R/W
0
R/W
Description
Timer Enable
When this bit is set to 1, TCNT starts counting.
When this bit is cleared, TCNT stops counting and
is initialized to H'00.
Reserved
These bits are always read as 1 and cannot be
modified.
Clock Select 0 to 2
Selects the clock source to be input to TCNT. The
overflow frequency for φ = 20 MHz is enclosed in
parentheses.
000: Clock φ/2 (frequency: 25.6 µs)
001: Clock φ/64 (frequency: 819.2 µs)
010: Clock φ/128 (frequency: 1.6 ms)
011: Clock φ/512 (frequency: 6.6 ms)
100: Clock φ/2048 (frequency: 26.2 ms)
101: Clock φ/8192 (frequency: 104.9 ms)
110: Clock φ/32768 (frequency: 419.4 ms)
111: Clock φ/131072 (frequency: 1.68 s)
Rev. 1.0, 09/02, page 285 of 568
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