Section 16 Synchronous Serial Communication Unit (Ssu); Features - Hitachi H8S/2628 Hardware Manual

Section 16 Synchronous Serial Communication Unit (SSU)

This LSI has two independent synchronous serial communication unit (SSU) channels. The SSU
has master mode in which this LSI outputs clocks as a master device for synchronous serial
communication and slave mode in which clocks are input from an external device for synchronous
serial communication. Synchronous serial communication can be performed with devices having
different clock polarity and clock phase. In addition, synchronous serial communication can also
be performed between multiple processors (multi-processor communication). Figure 16.1 is a
block diagram of the SSU.
16.1

Features

• Choice of master mode and slave mode
• Choice of standard mode and bidirectional mode
• Synchronous serial communication with devices with different clock polarity and clock phase
• Choice of 8/16/32-bit width of transmit/receive data
• Full-duplex communication capability
The shift register is incorporated, enabling transmission and reception to be executed
simultaneously.
• Continuous serial communication
• Choice of LSB-first or MSB-first transfer
• Choice of a clock source
φ/2, φ/4, φ/8, φ/16, φ/32, φ/64, φ/128, φ/256, or external clock
• Five interrupt sources
transmit-end, transmit-data-register-empty, receive-data-full, overrun-error, and conflict error
• Module stop mode can be set
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