Table 10.7 TPSC0 to TPSC2 (Channel 2)
Bit 2
Channel
TPSC2
2
0
1
Note: This setting is ignored when channel 2 is in phase counting mode.
Table 10.8 TPSC0 to TPSC2 (Channel 3)
Bit 2
Channel
TPSC2
3
0
1
Bit 1
Bit 0
TPSC1
TPSC0
0
0
1
1
0
1
0
0
1
1
0
1
Bit 1
Bit 0
TPSC1
TPSC0
0
0
1
1
0
1
0
0
1
1
0
1
Description
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
Internal clock: counts on φ/1024
Description
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
Internal clock: counts on φ/1024
Internal clock: counts on φ/256
Internal clock: counts on φ/4096
Rev. 1.0, 09/02, page 169 of 568